FPGA registers access from Linux userspace - Revision history

FabienM: /* Introduction */

2017-02-27T08:59:28Z

‎Introduction

FabienM: /* PCIe */

2017-02-27T08:58:40Z

‎PCIe

FabienM: /* PCIe */

2017-02-27T08:58:01Z

‎PCIe

FabienM: /* PCIe */

2015-08-27T06:44:48Z

‎PCIe

FabienM: /* PCIe */

2015-01-14T15:03:54Z

‎PCIe

FabienM at 09:24, 14 January 2015

2015-01-14T09:24:38Z

FabienM: oups

2015-01-14T09:18:59Z

oups

FabienM at 09:18, 14 January 2015

2015-01-14T09:18:41Z

FabienM: /* the mmap problem */

2012-02-06T18:10:00Z

‎the mmap problem

FabienM: /* The problem */

2009-08-13T13:41:09Z

‎The problem

@@ Line 5: / Line 5: @@
 There are '''two methods''' to access FPGA registers on APF*.
-* For APF9328, APF27 and APF51 registers access are done with a memory bus (parallel).
+* For '''APF9328, APF27 and APF51''' registers access are done with a memory bus (parallel).
-* For APF6_SP registers access are done with PCIe
+* For '''APF6_SP''' registers access are done with PCIe
 == Memory bus ==

@@ Line 112: / Line 112: @@
 == PCIe ==
-On APF6_SP FPGA memory is accessed with PCIe, to read/write on FPGA space an example is available with [[Pci_debug | pci_debug]].
+On [[APF6_SP]] FPGA memory is accessed with PCIe, to read/write on FPGA space an example is available with [[Pci_debug | pci_debug]].
 See [[Pci_debug | pci_debug]] page to know how to access PCIe address space with a command line tool.

@@ Line 112: / Line 112: @@
 == PCIe ==
- {{Under_Construction}}
+On APF6_SP FPGA memory is accessed with PCIe, to read/write on FPGA space an example is available with [[Pci_debug | pci_debug]].
-−
 See [[Pci_debug | pci_debug]] page to know how to access PCIe address space with a command line tool.

@@ Line 113: / Line 113: @@
   {{Under_Construction}}
 ==Links==
 * http://sources.redhat.com/ml/crossgcc/2005-08/msg00120.html : Explanation of the problem.

@@ Line 112: / Line 112: @@
 == PCIe ==
-  TODO
+  {{Under_Construction}}
 ==Links==
 * http://sources.redhat.com/ml/crossgcc/2005-08/msg00120.html : Explanation of the problem.

@@ Line 1: / Line 1: @@
 [[Category:FPGA]]
-== fpgaregs ==
+== Introduction ==
 ===Installation===
 If the fpgaregs package is not already installed on your APF (''/usr/bin/fpgaregs''), you can select it in the Buildroot menuconfig:
 <pre class="host">
@@ Line 20: / Line 28: @@
 Then reflash your rootfs or install it manually.
-===Usage===
+====Usage====
 ''fpgaregs'' can be used to do read or write accesses (16 or 32 bits wide) to the FPGA, from Linux userspace/console.
-====16 bits read====
+=====16 bits read=====
 <pre class="apf">
 # fpgaregs w <address>
@@ Line 34: / Line 42: @@
 </pre>
-====16 bits write====
+=====16 bits write=====
 <pre class="apf">
 # fpgaregs w <address> <value>
@@ Line 41: / Line 49: @@
 Where <value> is hexadecimal value to write.
-====32 bits read====
+=====32 bits read=====
 <pre class="apf">
 # fpgaregs l <address>
 </pre>
-====32 bits write====
+=====32 bits write=====
 <pre class="apf">
 # fpgaregs l <address> <value>
 </pre>
-== the mmap problem ==
+=== the mmap problem ===
 {{Note| This problem is corrected with latest Toolchains compilation options}}
@@ Line 94: / Line 102: @@
 </source>
-=== The problem ===
+==== The problem ====
 By default, if the specific ''arm920t'' target is not specified, ''arm-linux-gcc'' will try to generate compatible read/write for all ARM9 model when it access register in 16bits. Indeed it seems that not all ARM9 have 16bits read/write capabilities (''ldrh'' asm instruction).
@@ Line 101: / Line 109: @@
 To avoid this painful problem don't forget the ''-mcpu=arm920t'' option when compiling ''fpgaregs'' for APF9328 and ''-mcpu=arm926ej-s'' for APF27.
 ==Links==
 * http://sources.redhat.com/ml/crossgcc/2005-08/msg00120.html : Explanation of the problem.

@@ Line 67: / Line 67: @@
 <source lang="c">
 ptr_fpga = mmap (0, 8192, PROT_READ|PROT_WRITE, MAP_SHARED, ffpga, FPGA_ADDRESS);
 </source>