Difference between revisions of "APF6 SP Interfaces description"
From ArmadeusWiki
(→Pinouts) |
|||
| Line 18: | Line 18: | ||
= Pinouts = | = Pinouts = | ||
* [[APF6_SP hirose pinout | Pinout on apf6sp hirose connector]] | * [[APF6_SP hirose pinout | Pinout on apf6sp hirose connector]] | ||
| + | * [[APF6_SP CycloneV pinout | All pinout for PCIe, DDR3, ...]] | ||
= Howto = | = Howto = | ||
Revision as of 09:16, 3 February 2016
Introduction
This page describe the FPGA interfaces for APF6_SP.
