Difference between revisions of "APF51"

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[[Category: APF51]]
 
==Description==
 
==Description==
The APF51 is a high-end Single Board Computer targeted for advanced GUI, intensive computation and extended connectivity.
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The APF51 is a high-end [https://en.wikipedia.org/wiki/Single-board_computer Single Board Computer] targeted for advanced GUI, intensive computation and extended connectivity.
  
 
Here is a list of the main features:
 
Here is a list of the main features:
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* Supplies: high end DC/DC converters and LDOs on board. Only one external supply of 5V required.
 
* Supplies: high end DC/DC converters and LDOs on board. Only one external supply of 5V required.
 
* Low power sleep mode  
 
* Low power sleep mode  
* Mechanical dimensions: ~00x00mm (TBD)
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* Mechanical dimensions: ~58x59mm
  
 
All the i.MX51 peripherals (LCD, 2xSDIO, 2xSPI, 6xSerial, I2C, CSI, 3xUSB, keypad, PWM, etc...) and the FPGA signals can be accessed through two high density [[Hirose connectors]].
 
All the i.MX51 peripherals (LCD, 2xSDIO, 2xSPI, 6xSerial, I2C, CSI, 3xUSB, keypad, PWM, etc...) and the FPGA signals can be accessed through two high density [[Hirose connectors]].
  
 
==Resources==
 
==Resources==
* TBD
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* [[Datasheet | Datasheet and schema]]
  
 
==Feature list==
 
==Feature list==
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===FPGA===
 
===FPGA===
 
* [[Using_FPGA]]
 
* [[Using_FPGA]]
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|}
  
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==Development boards==
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* [[APF51Dev]]
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* [[PPS51]]
  
 
[[Category:MainBoards]]
 
[[Category:MainBoards]]
 
[[Category:Hardware]]
 
[[Category:Hardware]]

Latest revision as of 08:40, 12 February 2015

Description

The APF51 is a high-end Single Board Computer targeted for advanced GUI, intensive computation and extended connectivity.

Here is a list of the main features:

  • Processor: Freescale i.MX51 (Cortex-A8 @ 800MHz)
  • RAM: Mobile DDR 400. 64 to 512MB. 32 bits data bus. Default capacity will be 256MB.
  • Flash: Mobile NAND. 512MB, 8 bits data bus.
  • Ethernet: onboard Physical (ready to use Ethernet 10/100Mbit link)
  • USB: High speed USB OTG (OnTheGo) with onboard Physical (ready to use USB OTG link)
  • USB: 2 High speed Hosts with integrated PHY
  • FPGA: Xilinx Spartan 6 (LX9 or LX16). Default: LX9
  • Touchscreen controler (4/5 wires)
  • Low speed ADCs (up to 4)
  • RTC and Watchdog
  • Battery charger (Li-On/Li-Po)
  • Supplies: high end DC/DC converters and LDOs on board. Only one external supply of 5V required.
  • Low power sleep mode
  • Mechanical dimensions: ~58x59mm

All the i.MX51 peripherals (LCD, 2xSDIO, 2xSPI, 6xSerial, I2C, CSI, 3xUSB, keypad, PWM, etc...) and the FPGA signals can be accessed through two high density Hirose connectors.

Resources

Feature list

Video

Video Out

Video In

Wired communication

User Input

Storage

Other

  • PWM: PWM output J2 pin 18 (2.8V output level if used)
  • GPIO_Driver
  • APF51_PMIC (Touchscreen, RTC, LEDs, GPIOs, ADCs, Battery)

FPGA

Development boards