Difference between revisions of "FuseSoC"

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== Introduction ==
 
== Introduction ==
−
FuseSoC is a builder written in python and used to assemblate different HDL design from libraries together.
+
FuseSoC is a package manager written in python and used to assemble different HDL design from libraries together.
−
FuseSoC is like Buildroot or Yocto used for Linux, it's just a «Makefile» that launch differents tools to build the system.
+
FuseSoC is like Buildroot or Yocto used for Linux, it's just a «Makefile» that launch different tools to build the system.
 +
 
 +
== Install fusesoc ==
 +
 
 +
* [https://github.com/fusesoc/fusesoc-cores Fusesoc] is a python3 package that can be installed with pip :
 +
<pre class="host">
 +
$ python3 -m pip install fusesoc
 +
</pre>
 +
 
 +
* To be up to date use --upgrade option:
 +
<pre class="host">
 +
$ python3 -m pip install --upgrade fusesoc
 +
</pre>
 +
 
 +
* Once installed a command named fusesoc is available on system :
 +
<pre class="host">
 +
$ fusesoc --version
 +
1.11.0
 +
</pre>
 +
 
 +
* Initialize library:
 +
<pre class="host">
 +
$ cd workspace
 +
$ fusesoc init
 +
</pre>
 +
 
 +
== Blinky ==
 +
 
 +
[https://github.com/fusesoc/blinky Blinky] is a project that aim do blink all FPGA board with a gateware constructed from fusesoc tool.
 +
 
 +
Here the way to blink Armadeus board with blinky.
 +
 
 +
First, git clone the blinky project:
 +
<pre class="host">
 +
$ cd workspace
 +
$ fusesoc library add --sync-type git blinky https://github.com/fusesoc/blinky
 +
</pre>
 +
 
 +
=== APF27 ===
 +
 
 +
* If you have [[ISE_WebPack_installation_on_Linux|ISE installed correctly]], you can synthesize blinky with following command:
 +
<pre class="host">
 +
$ fusesoc run --target=apf27 fusesoc:utils:blinky
 +
</pre>
 +
 
 +
* As we don't configure fpga with impact, the build will finish with an error :
 +
<pre class="host">
 +
ERROR: Failed to run fusesoc:utils:blinky:1.0 : 'impact' exited with an error code
 +
</pre>
 +
 
 +
* But the bitstream will be generated in :
 +
<pre class="host">
 +
./build/fusesoc_utils_blinky_1.0/apf27-ise/blinky.bit
 +
</pre>
 +
 
 +
* To configure the FPGA, copy it under your /tftpboot/ directory then download it with U-Boot:
 +
<pre class="host">
 +
cp ./build/fusesoc_utils_blinky_1.0/apf27-ise/blinky.bit /tftpboot/
 +
</pre>
 +
* Under U-Boot
 +
<pre class="apf">
 +
BIOS> tftpboot blinky.bit
 +
BIOS> fpga load 0 ${loadaddr} ${filesize}
 +
</pre>
 +
 
 +
* Admire the flashing LED
 +
 
 +
=== APF51 ===
 +
 
 +
* If you have [[ISE_WebPack_installation_on_Linux|ISE installed correctly]], you can synthesize blinky with following command:
 +
<pre class="host">
 +
$ fusesoc run --target=apf51 fusesoc:utils:blinky
 +
</pre>
 +
 
 +
* As we don't configure fpga with impact, the build will finish with an error :
 +
<pre class="host">
 +
ERROR: Failed to run fusesoc:utils:blinky:1.0 : 'impact' exited with an error code
 +
</pre>
 +
 
 +
* But the bitstream will be generated in :
 +
<pre class="host">
 +
./build/fusesoc_utils_blinky_1.0/apf51-ise/blinky.bin
 +
</pre>
 +
 
 +
* To configure the FPGA, copy it under your /tftpboot/ directory then download it with U-Boot:
 +
<pre class="host">
 +
cp ./build/fusesoc_utils_blinky_1.0/apf51-ise/blinky.bin /tftpboot/
 +
</pre>
 +
* Under U-Boot
 +
<pre class="apf">
 +
BIOS> tftpboot blinky.bin
 +
BIOS> fpga load 0 ${loadaddr} ${filesize}
 +
</pre>
 +
 
 +
* Admire the flashing LED
 +
 
 +
=== OPOS6UL_SP ===
 +
 
 +
* If you have ISE installed correctly, you can synthesize blinky with following command:
 +
<pre class="host">
 +
$ fusesoc run --target=op6sp fusesoc:utils:blinky
 +
</pre>
 +
 
 +
* As we don't configure fpga with impact, the build will finish with an error :
 +
<pre class="host">
 +
ERROR: Failed to run fusesoc:utils:blinky:1.0 : 'impact' exited with an error code
 +
</pre>
 +
 
 +
* But the bitstream will be generated in :
 +
<pre class="host">
 +
./build/fusesoc_utils_blinky_1.0/op6sp-ise/blinky.bit
 +
</pre>
 +
 
 +
* To configure the FPGA, copy it under your /tftpboot/ directory then download it with U-Boot:
 +
<pre class="host">
 +
cp ./build/fusesoc_utils_blinky_1.0/op6sp-ise/blinky.bit /tftpboot/
 +
</pre>
 +
* Under U-Boot
 +
<pre class="apf">
 +
BIOS> tftpboot blinky.bit
 +
BIOS> fpga load 0 ${loadaddr} ${filesize}
 +
</pre>
 +
 
 +
* <strike>Admire the flashing LED</strike> : Fix the configuration bug.
  
 
== Ressources ==
 
== Ressources ==

Latest revision as of 14:48, 3 August 2020


Page under construction... Construction.png Informations on this page are not guaranteed !!


Introduction

FuseSoC is a package manager written in python and used to assemble different HDL design from libraries together. FuseSoC is like Buildroot or Yocto used for Linux, it's just a «Makefile» that launch different tools to build the system.

Install fusesoc

  • Fusesoc is a python3 package that can be installed with pip :
$ python3 -m pip install fusesoc
  • To be up to date use --upgrade option:
$ python3 -m pip install --upgrade fusesoc
  • Once installed a command named fusesoc is available on system :
$ fusesoc --version
1.11.0
  • Initialize library:
$ cd workspace
$ fusesoc init

Blinky

Blinky is a project that aim do blink all FPGA board with a gateware constructed from fusesoc tool.

Here the way to blink Armadeus board with blinky.

First, git clone the blinky project: 

$ cd workspace
$ fusesoc library add --sync-type git blinky https://github.com/fusesoc/blinky

APF27

$ fusesoc run --target=apf27 fusesoc:utils:blinky
  • As we don't configure fpga with impact, the build will finish with an error :
ERROR: Failed to run fusesoc:utils:blinky:1.0 : 'impact' exited with an error code
  • But the bitstream will be generated in :
./build/fusesoc_utils_blinky_1.0/apf27-ise/blinky.bit
  • To configure the FPGA, copy it under your /tftpboot/ directory then download it with U-Boot:
cp ./build/fusesoc_utils_blinky_1.0/apf27-ise/blinky.bit /tftpboot/
  • Under U-Boot
BIOS> tftpboot blinky.bit
BIOS> fpga load 0 ${loadaddr} ${filesize}
  • Admire the flashing LED

APF51

$ fusesoc run --target=apf51 fusesoc:utils:blinky
  • As we don't configure fpga with impact, the build will finish with an error :
ERROR: Failed to run fusesoc:utils:blinky:1.0 : 'impact' exited with an error code
  • But the bitstream will be generated in :
./build/fusesoc_utils_blinky_1.0/apf51-ise/blinky.bin
  • To configure the FPGA, copy it under your /tftpboot/ directory then download it with U-Boot:
cp ./build/fusesoc_utils_blinky_1.0/apf51-ise/blinky.bin /tftpboot/
  • Under U-Boot
BIOS> tftpboot blinky.bin
BIOS> fpga load 0 ${loadaddr} ${filesize}
  • Admire the flashing LED

OPOS6UL_SP

  • If you have ISE installed correctly, you can synthesize blinky with following command:
$ fusesoc run --target=op6sp fusesoc:utils:blinky
  • As we don't configure fpga with impact, the build will finish with an error :
ERROR: Failed to run fusesoc:utils:blinky:1.0 : 'impact' exited with an error code
  • But the bitstream will be generated in :
./build/fusesoc_utils_blinky_1.0/op6sp-ise/blinky.bit
  • To configure the FPGA, copy it under your /tftpboot/ directory then download it with U-Boot:
cp ./build/fusesoc_utils_blinky_1.0/op6sp-ise/blinky.bit /tftpboot/
  • Under U-Boot
BIOS> tftpboot blinky.bit
BIOS> fpga load 0 ${loadaddr} ${filesize}
  • Admire the flashing LED : Fix the configuration bug.

Ressources

Retrieved from "http://www.armadeus.org/wiki/index.php?title=FuseSoC&oldid=14947"