I2C

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This page will summarize the informations to use the I2C bus on our boards.

Overview

The I2C bus is a simple & widely used two wires synchronous bus. It has been developped by Philips (now NXP).
The standard frequency is 100kHz but 400kHz devices can be found (for example on the i.MX). Single and multi masters are supported. Only the single master configuration will be discussed here.

The bus is based on two signals: SDA and SCL.

  • SDA: bidirectional line for data
  • SCL: unidirectional line for the clock (provided by the master)

Details can be found in the specification here.

Linux configuration

By default the I2C bus is activated in the Armadeus distrib. If you need to deactivate it, take a look at the linux menuconfig:

$ make linux-menuconfig

Linux user space C code

Kernel source has a good documentation on using i2c bus through /dev with C program, it can be found in kernel source directory Documentation/i2c/dev-interface.

You can find a sample code under target/packages/ch7024ctrl/ of the Armadeus distribution ( or here through SF's SVN browsing )

On APF27

Tested I2C chips

APF27 I2C chips

List of all hardware devices on APF27 I2C busses

"I2C" and "I2C2" are the busses names from the iMX27 datasheet
"I2C-0" and "I2C-1" are the corresponding linux device names
  • I2C (I2C-0):
                 none
  • I2C2 (I2C-1):
                 24AA02 Microchip Technology
                 256X8 EEPROM
                 I2C ADDRESS 0x50 to 0x57 (bits 0-2 are don't care)

APF27_DEV I2C chips

List of all hardware devices on APF27_DEV I2C busses

"I2C" and "I2C2" are the busses names from the iMX27 datasheet
"I2C-0" and "I2C-1" are the corresponding linux device names


  • I2C (I2C-0):
                 DS1374 Dallas Semiconductors
                 32 bits time of day counter (1s increment)
                 I2C ADDRESS 0x68                  
                 MAX5821L MAXIM
                 Dual 10bits DAC
                 I2C ADDRESS 0x38                  


  • I2C2 (I2C-1):
                 AD9889 Analog Devices
                 HDMI I/F
                 I2C ADDRESSES
                 * Main ctrl register 0x39
                 * Spare packet memory (31 bytes) 0x38 (default)
                 * EDID memory area (256 bytes) 0x3F (default)

I2C bus logic 5v level adaptation (if necessary)

if you want to use I2C devices which can not work with the I2C voltage of the APF board, a level translator has to be used, for example a PCA9306 from NXP:

  • Connect pin 1 to the local GND
  • Connect pin 2 to the local I2C iMX supply voltage
  • Connect pin 3 to the SCL output of the APF
  • Connect pin 4 to the SDA input/ouput of the APF
  • Connect pin 7 and 8 together and the add a 200K resistor in parallel to a 100nF capacitor to GND
  • Connect a pullup of 1.7K between your I2C device supply and the SCL line (pin 6)
  • Connect a pullup of 1.7K between your I2C device supply and and the SDA line (pin 5)

For more details, take a look at the PCA9306 datasheet. This chip is the one that can be mounted by users on the APF9328DevFull board.

As a low-cost alternative, a level shifter can be built with a pair of N-channel mosfets (such as a BS170). See the Application Note 97055.

Links