Difference between revisions of "PCIe FPGA loading"
From ArmadeusWiki
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PCIe must be activated before Linux boot. To do that, just load the peripheral bitstream with uboot : | PCIe must be activated before Linux boot. To do that, just load the peripheral bitstream with uboot : | ||
| − | <pre class=" | + | <pre class="apf"> |
BIOS> tftpboot ${loadaddr} 192.168.0.117:binary.periph.rbf | BIOS> tftpboot ${loadaddr} 192.168.0.117:binary.periph.rbf | ||
BIOS> fpga load 0 ${loadaddr} ${filesize} | BIOS> fpga load 0 ${loadaddr} ${filesize} | ||
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Then boot Linux: | Then boot Linux: | ||
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BIOS> boot | BIOS> boot | ||
</pre> | </pre> | ||
Revision as of 11:16, 14 January 2015
Contents
Introduction
On APF6_SP it's possible to use the PCI express bus to configure fpga (cycloneV). This article describe how to do that.
Generate files
Quartus configuration
Your design must include the PCIe and CvP components. Once the project synthesized, open the menu
File -> Convert Programming Files ...
- In Output programming file select the programming file type: Raw Binary File (.rbf).
- In Input files to convert clic on Add Files... and add your binary.sof file.
- In Output programming file check the option Create CvP files (Generate binary.periph.rbf and binary.core.rbf)
- Click on Generate
You will get two files :
- binary.periph.rbf: peripheral config file to be loaded via serial config bus with uboot
- binary.core.rbf: core config file to be loaded via PCIe bus with Linux.
Linux configuration
Configure the FPGA
Peripheral configuration in uboot
PCIe must be activated before Linux boot. To do that, just load the peripheral bitstream with uboot :
BIOS> tftpboot ${loadaddr} 192.168.0.117:binary.periph.rbf
BIOS> fpga load 0 ${loadaddr} ${filesize}
Then boot Linux:
BIOS> boot
