Difference between revisions of "VHDL coding styles"

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[[Category: FPGA]]
 
This page describe ways to write good VHDL code. And give some tip in this language.
 
This page describe ways to write good VHDL code. And give some tip in this language.
  
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* [http://www.lcdm-eng.com/Resets1.pdf Reset synchrone or reset asynchrone ? That is the question]
 
* [http://www.lcdm-eng.com/Resets1.pdf Reset synchrone or reset asynchrone ? That is the question]
 
* [http://www.dz.ee.ethz.ch/en/information/hdl-help/vhdl-sources.html How to convert type]
 
* [http://www.dz.ee.ethz.ch/en/information/hdl-help/vhdl-sources.html How to convert type]
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* [http://www.gaisler.com/doc/vhdl2proc.pdf A structured VHDL design method]
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* [http://www.gaisler.com/doc/structdes.pdf A structured VHDL design method (presentation)]
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* [http://www.ohwr.org/attachments/554/VHDLcoding.pdf CERN coding rules]

Latest revision as of 08:34, 12 February 2015

This page describe ways to write good VHDL code. And give some tip in this language.

Links