Difference between revisions of "IR Receiver"
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This page will summarize the informations to connect an InfraRed receiver to your Armadeus board | This page will summarize the informations to connect an InfraRed receiver to your Armadeus board | ||
| + | |||
| + | ==Introduction== | ||
| + | Most IR remote control send their key code using the RC5 protocol (see links). This protocol can be mostly seen as a one wire serial Manchester link. | ||
| + | In this application we will see how to user 38Khz carrier IR receiver. | ||
| + | |||
| + | ==Hardware== | ||
| + | For first tries we choose the Sharp's xxxxx as IR receiver. This chip is is 3,3v compatible and can be directly connected to i.MXL or FPGA IOs. | ||
| + | As RC5 decoding in software is quite a big overhead, we choose to implement an RC5 decoding IP for the FPGA.<br> | ||
| + | On x86 architecture a serial port is often used to decode RC5 frame but it's very CPU consumming. | ||
| + | |||
| + | RC5 IP in the FPGA will decode Manchester frame and store it in a FIFO. When there are frame in the FIFO the FPGA will generate an interrupt to signal i.MXL Linux driver that data are available | ||
| + | IP will be configurable with: | ||
| + | * an configuration register to activate/deactivate interrupt | ||
| + | * a status register to see interrupt status and acknowledge them | ||
| + | * a FIFO register to get RC5 frame one at a time | ||
| + | |||
| + | ==Software== | ||
| + | We will use LIRC framework. A custom Linux driver will have to be written. | ||
| + | As RC5 is very similar to PS/2 we will reuse the work done for PS/2 controller. | ||
==Links== | ==Links== | ||
Revision as of 16:16, 5 August 2007
This page will summarize the informations to connect an InfraRed receiver to your Armadeus board
Contents
Introduction
Most IR remote control send their key code using the RC5 protocol (see links). This protocol can be mostly seen as a one wire serial Manchester link. In this application we will see how to user 38Khz carrier IR receiver.
Hardware
For first tries we choose the Sharp's xxxxx as IR receiver. This chip is is 3,3v compatible and can be directly connected to i.MXL or FPGA IOs.
As RC5 decoding in software is quite a big overhead, we choose to implement an RC5 decoding IP for the FPGA.
On x86 architecture a serial port is often used to decode RC5 frame but it's very CPU consumming.
RC5 IP in the FPGA will decode Manchester frame and store it in a FIFO. When there are frame in the FIFO the FPGA will generate an interrupt to signal i.MXL Linux driver that data are available IP will be configurable with:
- an configuration register to activate/deactivate interrupt
- a status register to see interrupt status and acknowledge them
- a FIFO register to get RC5 frame one at a time
Software
We will use LIRC framework. A custom Linux driver will have to be written. As RC5 is very similar to PS/2 we will reuse the work done for PS/2 controller.
