Difference between revisions of "OPOS6UL SP Interfaces description"
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+ | {{Under Construction}} | ||
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+ | == Introduction == | ||
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+ | This article describe the bus interface communication between the i.MX6UL(L) and the spartan6. In i.MX6UL(L) the bus used to make communication with the FPGA is named '''EIM''' for '''E'''xternal '''I'''nterface '''M'''odule. | ||
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+ | == Links == | ||
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+ | * [https://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf i.MX6UL(L) reference manual](PDF chapter 21 page 821) | ||
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+ | [[Using_FPGA| << FPGA general page]] |
Revision as of 07:48, 12 September 2018
Page under construction...
Informations on this page are not guaranteed !!
Introduction
This article describe the bus interface communication between the i.MX6UL(L) and the spartan6. In i.MX6UL(L) the bus used to make communication with the FPGA is named EIM for External Interface Module.
Links
- i.MX6UL(L) reference manual(PDF chapter 21 page 821)