OPOS6UL SP Interfaces description

From ArmadeusWiki
Revision as of 10:21, 14 September 2018 by FabienM (Talk | contribs) (Links)

Jump to: navigation, search


Page under construction... Construction.png Informations on this page are not guaranteed !!

Introduction

This article describe the bus interface communication between the i.MX6UL(L) and the spartan6. In i.MX6UL(L) the bus used to make communication with the FPGA is named EIM for External Interface Module. All description of this bus can be found under the i.MX6UL(L) reference manual in chapter 21 (page 821).

Simplified view

Default configuration on CSx

Clocks

Chip Select

Timings

HDL register access examples

Pinout

FPGA Interrupt

FPGA configuration protocol

Links

<< FPGA general page