Difference between revisions of "A simple design with Wishbone bus"

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This article intended to explain how to design Wishbone compatible components with simple example. The VHDL code sources can be found in sourceforge tree.

Description of wishbone structure for ARMadeus can be found here in french.

General structure

The main functionality of this component is to do the same things that benoît project : switch on a led when a button is pressed.

But to learn about designing Wishbone component and linux driver, the design is little bit more complicated (!).

When button is pressed, the component button send interrupt signal to irq_mngr. irq_mngr will toggle a flag and send interruption to i.mx processor. A Linux driver on i.mx will read irq_mngr and acknowledge irq by writing '1' on a register. And finally, Linux driver will toggle led value by writing on led register.

figure 1 - Schematics of wishbone example

imx_wrapper, syscon and irq_mngr are standards ARMadeus-Wishbone IPs that just been instantiated in our design.

button and led are simple slave component we want to integrate in the FPGA.

All these components are connected together with the 'glue logic' component intercon.

Wrapper

The wrapper is used to convert i.MX interface signals into Wishbone signals. Table above show signals from i.MX and signals to wishbone conversion :

Intercon

The intercon is a component used to manage signal between wishbone master and slaves component. This component decode Wishbone-master addresses and dispatch its to Wishbone-slave components.

figure 2 - Intercon internal structure

Wishbone slave application components

In this example their are 3 wishbone-slave components :

irq manager

Some component (here, just button) generate interrupts, irq manager is used to group these interrupts for i.MX. The irq_mngr can manage up to 16 internal interrupts.

IRQ manager component has tree registers, one to enable interrupts, one for flags/acknowledge interrupts and one identification register :

wb_led

This component is a simple 16-bit Wishbone slave output port, from wishbone specification example (p110).

figure 3 - Led internal structure

It is a simple register, that can be read and write. The led is controlled with register pin 0.

The two registers are :

wb_button

Wb_button component, is like led but in read only and with an edge detector to rise irq.

figure 4 - Button internal structure

The two registers are:

Components drivers

Each component is drove with a Linux driver described above. All driver code is in armadeus directory in target/linux/module/fpga/wishbone_example/.

Each component has an identification register with unique number. This number is used by driver to unsure that device is present when it modproded.

irq manager

The description of IRQ management module is available here. The module code source can be found here.

led

Led driver is seen in linux like a character driver. Writing in dev file will enable or disable LED.

The driver is composed of two modules :

• g_led : this module implement generic led driver mechanisms.
• board_led : This module describe specific datas for each led-component available in design. These datas are described in structure plat_led_port and plat_led_device. The module will register each LED with platforme_device_register function. When a plat_led__port device is registered, g_led driver will detect it and will probe it with led_probe function.

button

Button driver is seen in Linux like a character driver. When a process want to read value in button register, the driver will block reading until an interrupt occur.

Structure of button driver is similar to led driver, it is decomposed in two modules :

• gbutton : This module implement generic button driver mechanisms.
• board_button : Like LED module, this module describe specifics datas for each button-component available in design.

Using the design

All code for this design is available in ARMadeus tree, firmware (VHDL) and software (Linux drivers).

Make the FPGA bitstream

ISE Webpack is mandatory to generate the bitstream, then its installation is required. Once bitstream generated, it can be downloaded in FPGA with U-Boot or Linux.

Compile Linux drivers

To compile driver for this design select it in make linux26-menuconfig :

    Device Drivers --->
        Armadeus specific drivers --->
            FPGA Drivers --->
                [*] Drivers for wishbone example 
                <M>     Wishbone Button driver
                <M>     Wishbone Led driver
                <M>     IRQ manager with wishbone interface

Then make linux

make linux26

Then Flash Linux and rootfs.

Play with button and led