Difference between revisions of "MotionSystem"

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The Xilinx ISE® WebPACK™ design software is used to build the FPGA firmware.
 
The Xilinx ISE® WebPACK™ design software is used to build the FPGA firmware.
  
;1 - Create a new project for the Spartan 3:</b>
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;1 - Create a new project for the Spartan 3:
 
:File->New Project
 
:File->New Project
 
:Select Top Level Source: HDL (Harware Description Language)
 
:Select Top Level Source: HDL (Harware Description Language)
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:Preferred Language: VHDL
 
:Preferred Language: VHDL
  
Import the source files in the project:
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;2 - Import the source files in the project:
Projet->Add Source
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:Projet->Add Source
Select files:
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:Select files:
SERVO_top.vhd
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:SERVO_top.vhd
COUNTER.vhd
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:COUNTER.vhd
pwm_module.vhd
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:pwm_module.vhd
servo.ucf
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:servo.ucf
  
 
2 - SYNTHESIZE - SERVO_top.bit FIRMWARE FILE CREATION
 
2 - SYNTHESIZE - SERVO_top.bit FIRMWARE FILE CREATION

Revision as of 10:15, 18 June 2009

Project Description

The application field of this project is robotic.

The goal of this project is to provide a R/C Servos Controller to manage R/C by different ways, and a motion measurement system via accelerometers.

The project is composed by different componants:

  • A hardware board on which are plugged R/C servos, accelerometers and ADC multiplexers.
  • A FPGA firmware which manages R/C servo at low level (Already written, thanks to Sonzerro and Fabien Marteau).
  • A Linux Kernel Driver which manages the FPGA Firware, the ADC multiplexers and ADC Max1027.
  • A user space daemon which manages the driver and listen on TCP port to accept remote commands from the network.
  • A user desktop application which sends commands to the daemon.

Texte italique

Participating Armadeus members

  • Yvan ROCH

Project data

Introduction

Overall original objectives of the project have not been reached. The following functionality are not implemented:

  • The accelerometers and ADC multiplexers are under development (hardware, driver and user application).
  • The board is available in schematic form. No PCB layout.

The following functionality are implemented:

  • A FPGA firmware which manages R/C servo at low level.
  • A Linux Kernel Driver which manages the FPGA Firware.
  • A user space daemon which manages the driver and listen on TCP port to accept remote commands from the network.
  • A user desktop application which sends commands to the daemon.

Project Files

All the necessary files are available in an archive under the following URL: Project Files

Hardware Board

The board contains the logic and voltage level adaptation to drive the R/C servos. As already said, the is no PCB layout.

The schematic is available in the file...

The schematic was design with Eagle available at the following URL: Eagle

FPGA Firmware

Linux Kernel Driver

User Space Daemon

User GUI Application

How to use the project

Introduction

The main goal of this project is to develop a system to manage motion on robotic platform. Finally only the subsystem that manages R/C servos is achieved. The MotionSystem can manage up to 32 R/C servos. R/C servos are a good solution to the moving issue on a small robotic platform. Hobbyist robotic platform like Lynxmotion Robots (http://www.lynxmotion.com) use many R/C servos.

R/C Servo

A description (in French) of such R/C servo can be found at http://fribotte.free.fr. R/C servo needs a pulse-width modulated (PWM) signal to manage his angular position. This signal looks like this:

R/C Servo PWM Signal

Basically, it is possible to generate this signal with a GPIO pin controlled by Linux kernel code. But this solution has three major drawbacks:

  • The true concurrency is impossible, R/C servo signal are not synchronous
  • The delays of PWM signal (between 0.5 ms and 2.5 ms) are mandatory implemented with busy waiting (udelay Linux kernel function) to give the necessary accuracy. It is very processor time consuming.
  • Due to the intrinsic non real time characteristic of the Linux kernel, the accuracy of the delays are impassible on a heavy loaded system. This causes R/C servo jittering (When a R/C servo jitters, it seems to have Parkinson's disease... Jitter

For these reasons, the subsystem that generates PWM signals is implemented in the FPGA. In a FPGA, true concurrency is feasible, no processor time is used and timings are very strict.

MotionSystem Architecture

The MotionSystem architecture is describe in the following diagram:

MotionSystem Architecture

Hardware Board

FPGA Firmware

For basics about FPGA on Armadeus board, please consult FPGA.

The FPGA firmware is located in the fpgaFirmware directory of the main archive file of the project (see above). The following files form the FPGA firmware:

SERVO_top.vhd: This is the main module.

COUNTER.vhd: This module is a 16 bits counter at 4 MHz used by all the PWM modules.

RESET_MODULE.vhd: This module is a cold start reset generator.

pwm_module.vhd: This module generates the PWM output.

servo.ucf: Signals/pins mapping file.

How to build the FPGA Firmware:

The Xilinx ISE® WebPACK™ design software is used to build the FPGA firmware.

1 - Create a new project for the Spartan 3
File->New Project
Select Top Level Source: HDL (Harware Description Language)
For the Aramadeus FPGA choose:
Family: Spartan3
Device: XC3S200
Package: TQ144
Speed: -4
Top Level Source: HDL
Synthesis Tool: XST
Simulator: ISE Simulator (VHDL/Verilog)
Preferred Language: VHDL
2 - Import the source files in the project
Projet->Add Source
Select files:
SERVO_top.vhd
COUNTER.vhd
pwm_module.vhd
servo.ucf

2 - SYNTHESIZE - SERVO_top.bit FIRMWARE FILE CREATION Generate Programming File->right clic->Run

3 - LOADING OF SERVO_top.bit FIRMWARE FILE IN APF9328 Go to the SERVO_top.bit directory

Linux Kernel Driver

User Space Daemon

User GUI Application

Links