Difference between revisions of "Qsys USB BLASTER Jtag-avalon-MM"
From ArmadeusWiki
(→Access avalon-MM registers) |
(→Access avalon-MM registers) |
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* Connect to USB-BLaster JTAG-avalon-MM instance : | * Connect to USB-BLaster JTAG-avalon-MM instance : | ||
| − | < | + | <source lang="tcl"> |
% set masters [get_service_paths master] | % set masters [get_service_paths master] | ||
| + | /devices/5CGXBC3B(6|7)|5CGXFC3B(6|7)@1#1-1.2.4/(link)/JTAG/jtag_phy_1.jtag/phy_1/master | ||
% set master [lindex $masters 0] | % set master [lindex $masters 0] | ||
| + | /devices/5CGXBC3B(6|7)|5CGXFC3B(6|7)@1#1-1.2.4/(link)/JTAG/jtag_phy_1.jtag/phy_1/master | ||
% open_service master $master | % open_service master $master | ||
| − | </ | + | </source> |
* Write 32bits value | * Write 32bits value | ||
| − | < | + | <source lang="tcl"> |
% master_write_32 $master 0x4 0xdeadbeef | % master_write_32 $master 0x4 0xdeadbeef | ||
| − | </ | + | </source> |
* Read 32bits value | * Read 32bits value | ||
| − | < | + | <source lang="tcl"> |
% master_read_32 $master 0x0 2 | % master_read_32 $master 0x0 2 | ||
| − | </ | + | </source> |
== Links == | == Links == | ||
* [https://www.altera.com/en_US/pdfs/literature/ug/ug_usb_blstr.pdf USB-Blaster (pdf)] | * [https://www.altera.com/en_US/pdfs/literature/ug/ug_usb_blstr.pdf USB-Blaster (pdf)] | ||
Revision as of 17:54, 31 March 2015
Introduction
It's possible to access avalon-MM bus with an USB-Blaster connected to jtag. To do that a special ip-core must be instanciated in Qsys and a system console must be launched in Quartus.
Instanciate Jtag-avalon-MM
Access avalon-MM registers
- Launch Systemp console in Quartus :
tools -> System debugging tools -> system console
- Connect to USB-BLaster JTAG-avalon-MM instance :
% set masters [get_service_paths master]
/devices/5CGXBC3B(6|7)|5CGXFC3B(6|7)@1#1-1.2.4/(link)/JTAG/jtag_phy_1.jtag/phy_1/master
% set master [lindex $masters 0]
/devices/5CGXBC3B(6|7)|5CGXFC3B(6|7)@1#1-1.2.4/(link)/JTAG/jtag_phy_1.jtag/phy_1/master
% open_service master $master
- Write 32bits value
% master_write_32 $master 0x4 0xdeadbeef
- Read 32bits value
% master_read_32 $master 0x0 2
