Difference between revisions of "Using FPGA"
From ArmadeusWiki
(→FPGA Interfaces) |
(→APF6_SP) |
||
Line 19: | Line 19: | ||
* [[IMX51-Spartan6 interface description]] | * [[IMX51-Spartan6 interface description]] | ||
==== [[APF6_SP]] ==== | ==== [[APF6_SP]] ==== | ||
+ | * [[APF6_SP_The_full_howto | The full FPGA howto for the APF6_sp, with PCIe, DDR3 and I/O]] | ||
* [[IMX6-CycloneV interface description | IMX6-CycloneV interface description (PCIe)]] | * [[IMX6-CycloneV interface description | IMX6-CycloneV interface description (PCIe)]] | ||
* [[DDR3-CycloneV interface description | DDR3-CycloneV interface description]] | * [[DDR3-CycloneV interface description | DDR3-CycloneV interface description]] |
Revision as of 16:35, 2 February 2016
Developing on the APF FPGA
FPGA InterfacesAPF9328APF27APF51APF6_SP
|
Using Armadeus FPGAManage the FPGA from Armadeus distribution.
|
Make some examplesThese examples give the basis to make VHDL design for FPGA.
|
Design ToolsDescription of tools used to simulate, to synthesize, and to download/configure FGPA. Xilinx
Altera
|
Automatize FPGA design makingPeripherals On DemandFor complex projects, POD should be used to simplify design. MigenWith migen, it's possible to develop FPGA design in Python then generate Verilog for synthezis. ChiselWith Chisel, it's possible to develop FPGA design in Scala then generate C++ model for simulation and Verilog model for synthezis. |
VHDL
Verilog |
LinksSome useful links. Wishbone Spartan CycloneV |